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tóng-àn:CMOS Inverter.svg

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Soat-bêng
English: Layout of NMOS and PMOS components in an Inverter (NOT Gate).
Español: Disposición de componentes NMOS y PMOS en un inversor (Puerta NO).
Ji̍t-kî
Chhut-chhù Ka-tī chò--ê
Chok-chiá inductiveload
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3b42cd2109c73e52b0ad8970563504b8ec7ffb77

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Ji̍t-kî/Sî-kan細張圖寸尺Iōng-chiáChù-kái
hiān-chāi2015-nî 11-goe̍h 4-ji̍t (pài-saⁿ) 14:322015-nî 11-goe̍h 4-ji̍t (pài-saⁿ) 14:32版本的細圖250 × 250(6 KB)Edgar.bonetRemoved an extraneous small dot, simplified the SVG code.
2008-nî 12-goe̍h 10-ji̍t (pài-saⁿ) 23:552008-nî 12-goe̍h 10-ji̍t (pài-saⁿ) 23:55版本的細圖250 × 250(18 KB)Lyctc~commonswikiReverted to version as of 19:39, 8 August 2007
2008-nî 12-goe̍h 10-ji̍t (pài-saⁿ) 23:542008-nî 12-goe̍h 10-ji̍t (pài-saⁿ) 23:54版本的細圖250 × 250(2 KB)Lyctc~commonswiki{{Information |Description= Removed dot. |Source= |Date= |Author= |Permission= |other_versions= }}
2008-nî 12-goe̍h 10-ji̍t (pài-saⁿ) 23:522008-nî 12-goe̍h 10-ji̍t (pài-saⁿ) 23:52版本的細圖250 × 250(2 KB)Lyctc~commonswiki{{Information |Description=Layout of NMOS and PMOS components in an Inverter (NOT Gate) |Source=*Image:_CMOS_Inverter.svg |Date=2008-12-10 23:51 (UTC) |Author=*derivative work: ~~~ *Image:_CMOS_Inverter.svg: inductiveload |Permission=see below
2007-nî 8-goe̍h 8-ji̍t (pài-saⁿ) 19:392007-nî 8-goe̍h 8-ji̍t (pài-saⁿ) 19:39版本的細圖250 × 250(18 KB)Dicklyonimproved transistor symbols and centering a bit
2006-nî 7-goe̍h 12-ji̍t (pài-saⁿ) 19:112006-nî 7-goe̍h 12-ji̍t (pài-saⁿ) 19:11版本的細圖250 × 250(16 KB)Inductiveload{{Information |Description=Layout of NMOS and PMOS components in an Inverter (NOT Gate) |Source=Own drawing, Inkscape 0.43 |Date=12/07/06 |Author=inductiveload |Permission=PD |other_versions= }} Category:CMOS

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